# MobileNetV2: Inverted Residuals and Linear Bottlenecks

## ABSTRACT

In this paper we describe a new mobile architecture, MobileNetV2, that improves the state of the art performance of mobile models on multiple tasks and benchmarks as well as across a spectrum of different model sizes. We also describe efficient ways of applying these mobile models to object detection in a novel framework we call SSDLite. Additionally, we demonstrate how to build mobile semantic segmentation models through a reduced form of DeepLabv3 which we call Mobile DeepLabv3.

The MobileNetV2 architecture is based on an inverted residual structure where the input and output of the residual block are thin bottleneck layers opposite to traditional residual models which use expanded representations in the input and output [1]. MobileNetV2 uses lightweight depthwise convolutions to filter features in the intermediate expansion layer. Additionally, we find that it is important to remove non-linearities in the narrow layers in order to maintain representational power. We demonstrate that this improves performance and provide an intuition that led to this design. Finally, our approach allows decoupling of the input/output domains from the expressiveness of the transformation, which provides a convenient framework for further analysis. We measure our performance on ImageNet [2] classification, COCO object detection [3], VOC image segmentation [4]. We evaluate the trade-offs between accuracy, and number of operations measured by multiply-adds (MAdd), as well as the number of parameters.

## 摘要

MobileNetV2 架构基于倒置的残差结构，其中快捷连接位于窄的瓶颈层之间。中间展开层使用轻量级的深度卷积作为非线性源来过滤特征。此外，我们发现为了保持表示能力，去除窄层中的非线性是非常重要的。我们证实了这可以提高性能并提供了产生此设计的直觉。

## 1INTRODUCTION

Neural networks have revolutionized many areas of machine intelligence, enabling superhuman accuracy for challenging image recognition tasks. However, the drive to improve accuracy often comes at a cost: modern state of the art networks require high computational resources beyond the capabilities of many mobile and embedded applications.

This paper introduces a new neural network architecture that is specifically tailored for mobile and resource constrained environments. Our network pushes the state of the art for mobile tailored computer vision models, by significantly decreasing the number of operations and memory needed while retaining the same accuracy.

Our main contribution is a novel layer module: the inverted residual with linear bottleneck. This module takes as an input a low-dimensional compressed representation which is first expanded to high dimension and filtered with a lightweight depthwise convolution. Features are subsequently projected back to a low-dimensional representation with a linear convolution.

This module can be efficiently implemented using standard operations in any modern framework and allows our models to beat state of the art along multiple performance points using standard benchmarks. Furthermore, this convolutional module is particularly suitable for mobile designs, because it allows to significantly reduce the memory footprint needed during inference by never fully materializing large intermediate tensors. This reduces the need for main memory access in many embedded hardware designs, that provide small amounts of very fast software controlled cache memory.

## 1. 引言

Tuning deep neural architectures to strike an optimal balance between accuracy and performance has been an area of active research for the last several years. Both manual architecture search and improvements in training algorithms, carried out by numerous teams has led to creation of such well-known models as AlexNet [5], VGGNet [6], GoogLeNet [7], and ResNet [1]. Recently there has been lots of progress in algorithmic architecture exploration included hyper-parameter optimization [8, 9, 10] as well as various methods of network pruning [11, 12, 13, 14, 15, 16] and connectivity learning [17, 18]. A substantial amount of work has also been dedicated to changing the connectivity structure of the internal convolutional blocks such as in ShuffleNet [19] or introducing sparsity [20] and others [21].

Recently, [22, 23, 24, 25], opened up a new direction of bringing optimization methods including genetic algorithms and reinforcement learning to architectural search. However one drawback is that the resulting networks end up very complex. In this paper, we pursue the goal of developing better intuition about how neural networks operate and use that to guide the simplest possible network design. Our approach should be seen as complimentary to the one described in [22] and related work. In this vein our approach is similar to those taken by [19, 21] and allows to further improve the performance, while providing a glimpse on its internal operation. Our network design is based on MobileNetV1 [26]. It retains its simplicity and significantly improves its accuracy, achieving state of the art on multiple image classification and detection tasks for mobile applications.

## 3. PRELIMINARIES, DISCUSSION AND INTUITION 准备，讨论和直觉

### 3.1. DEPTHWISE SEPARABLE CONVOLUTIONS 深度可分卷积

Depthwise Separable Convolutions are a key building block for many efficient neural network architectures [26, 27, 19] and we use them in the present work as well. The basic idea is to replace a full convolutional operator with a factorized version that splits convolution into two separate layers. The first layer is called a depthwise convolution, it performs lightweight filtering by applying a single convolutional filter per input channel. The second layer is a 1×1 convolution, called a pointwise convolution, which is responsible for building new features through computing linear combinations of the input channels.

Standard convolution takes an$K\in \mathbf{R}^{k\times k \times d_i \times d_j}$ input tensor Li, and applies convolutional kernel $K\in \mathbf{R}^{k\times k \times d_i \times d_j}$ to produce an hi×wi×dj output tensor Lj. Standard convolutional layers have the computational cost of $h_i \cdot w_i \cdot d_i \cdot d_j \cdot k \cdot k$。

Depthwise separable convolutions are a drop-in replacement for standard convolutional layers. Empirically they work almost as well as regular convolutions but only cost:

$$$$h_i \cdot w_i \cdot d_i (k^2 + d_j) \tag{1}$$$$

which is the sum of the depthwise and 1×1 pointwise convolutions. Effectively depthwise separable convolution reduces computation compared to traditional layers by almost a factor of $k^2$（more precisely, by a factor $k^2 \cdot dj/(k2+dj)$）. MobileNetV2 uses k=3 (3×3 depthwise separable convolutions) so the computational cost is 8 to 9 times smaller than that of standard convolutions at only a small reduction in accuracy [26].

### 3.2. LINEAR BOTTLENECKS 线性瓶颈

Consider a deep neural network consisting of n layers $L_i$each of which has an activation tensor of dimensions $h_i \times w_i \times d_i$. Throughout this section we will be discussing the basic properties of these activation tensors, which we will treat as containers of$h_i \times w_i$ “pixels” with $d_i$ dimensions. Informally, for an input set of real images, we say that the set of layer activations (for any layer$L_i$) forms a “manifold of interest”. Since such manifolds cannot generally be described analytically, we will study their properties empirically. For example, it has been long assumed that manifolds of interest in neural networks could be embedded in low-dimensional subspaces. In other words, when we look at all individual d-channel pixels of a deep convolutional layer, the information encoded in those values actually lie in some manifold, which in turn is embeddable into a low-dimensional subspace

At a first glance, such a fact could then be captured and exploited by simply reducing the dimensionality of a layer thus reducing the dimensionality of the operating space. This has been successfully exploited by MobileNetV1 [26] to effectively trade off between computation and accuracy via a width multiplier parameter, and has been incorporated into efficient model designs of other networks as well [19]. Following that intuition, the width multiplier approach allows one to reduce the dimensionality of the activation space until the manifold of interest spans this entire space. However, this intuition breaks down when we recall that deep convolutional neural networks actually have non-linear per coordinate transformations, such as ReLU. For example, ReLU applied to a line in 1D space produces a ’ray’, where as in$\mathbf {R}^n$ space, it generally results in a piece-wise linear curve with n-joints.

It is easy to see that in general if a result of a layer transformation ReLU(Bx) has a non-zero volume S, the points mapped to interiorS are obtained via a linear transformation B of the input, thus indicating that the part of the input space corresponding to the full dimensional output, is limited to a linear transformation. In other words, deep networks only have the power of a linear classifier on the non-zero volume part of the output domain. We refer to supplemental material for a more formal statement.

On the other hand, when ReLU collapses the activation space, it inevitably loses information. In Appendix A, we show that if the input manifold is embeddable into a significantly lower-dimensional subspace of the activation space then the ReLU transformation generally preserves the information while introducing the needed complexity into the set of expressible functions.

Figure 1: Examples of ReLU transformations of low-dimensional manifolds embedded in higher-dimensional spaces. In these examples the initial spiral is embedded into an n-dimensional space using random matrix T followed by ReLU, and then projected back to the 2D space using T−1. In examples above n=2,3 result in information loss where certain points of the manifold collapse into each other, while for n=15 to 30 the transformation is highly non-convex.

To summarize, we have highlighted two properties that are indicative of the requirement that the manifold of interest should lie in a low-dimensional subspace of the higher-dimensional activation space:

1. If the manifold of interest remains non-zero volume after ReLU transformation, it corresponds to a linear transformation.
2. ReLU is capable of preserving complete information about the input manifold, but only if the input manifold lies in a low-dimensional subspace of the input space.

These two insights provide us with an empirical hint for optimizing existing neural architectures: assuming the manifold of interest is low-dimensional we can capture this by inserting linear bottleneck layers into the convolutional blocks. Experimental evidence suggests that using linear layers is crucial as it prevents non-linearities from destroying too much information. In Section 6, we show empirically that using non-linear layers in bottlenecks indeed hurts the performance by several percent, further validating our hypothesis

1.如果感兴趣的流形在 ReLU 转换后保持非零体积，则其对应于线性转换。

2.只有当输入流形位于输入空间的低维子空间时，ReLU 才能保留有关输入流形的完整信息。

For the remainder of this paper we will be utilizing bottleneck convolutions. We will refer to the ratio between the size of the input bottleneck and the inner size as the expansion ratio.

(a) Regular

(b) Separable

(c) Separable with linear bottleneck

(d) Bottleneck with expansion layer

Figure 2: Evolution of separable convolution blocks. The diagonally hatched texture indicates layers that do not contain non-linearities. The last (lightly colored) layer indicates the beginning of the next block. Note: 1(d) and 1(c) are equivalent blocks when stacked. Best viewed in color.

### 3.3. 倒置残差

The bottleneck blocks appear similar to residual block where each block contains an input followed by several bottlenecks then followed by expansion [1]. However, inspired by the intuition that the bottlenecks actually contain all the necessary information, while an expansion layer acts merely as an implementation detail that accompanies a non-linear transformation of the tensor, we use shortcuts directly between the bottlenecks. Figure 3 provides a schematic visualization of the difference in the designs. The motivation for inserting shortcuts is similar to that of classical residual connections: we want to improve the ability of a gradient to propagate across multiplier layers. However, the inverted design is considerably more memory efficient (see Section 4 for details), as well as works slightly better in our experiments.

Finally, in our network design layers become removable: we can remove a convolutional block and rewire the rest of the network, without any retraining it results in a very modest cost to the accuracy. Similar experimental results were reported in [29]. The crucial difference, however, is that in residual networks the bottleneck layers are treated as low-dimensional supplements to high-dimensional “information” tensors. We refer to Section 6.4 for further details.

Figure 3: The difference between residual block [1, 28] and inverted residual. Diagonally hatched layers do not use non-linearities. We use thickness of each block to indicate its relative number of channels. Note how classical residuals connects the layers with high number of channels, whereas the inverted residuals connect the bottlenecks. Best viewed in color.

#### Running time and parameter count for bottleneck convolution

The basic implementation structure is illustrated in Table 1. For a block of size h×w, expansion factor t and kernel size k with d′ input channels and d′′ output channels, the total number of multiply add required is h⋅w⋅d′⋅t(d′+k2+d′′). Compared with (1) this expression has an extra term, as indeed we have an extra 1×1 convolution, however the nature of our networks allows us to utilize much smaller input and output dimensions. In Table 3 we compare the needed sizes for each resolution between MobileNetV1, MobileNetV2 and ShuffleNet.

Table 1: Bottleneck residual block transforming from k to$k’$ channels, with stride s, and expansion factor t.

### 3.4. 信息流解释 INFORMATION FLOW INTERPRETATION

One interesting property of our architecture is that it provides a natural separation between the input/output domains of the building blocks (bottleneck layers), and the layer transformation – that is a non-linear function that converts input to the output. The former can be seen as the capacity of the network at each layer, whereas the latter as the expressiveness. This is in contrast with traditional convolutional blocks, both regular and separable, where both expressiveness and capacity are tangled together and are functions of the output layer depth.

In particular, in our case, when inner layer depth is 0 the underlying convolution is the identity function thanks to the shortcut connection. When the expansion ratio is smaller than 1, this is a classical residual convolutional block [1, 28]. However, for our purposes we show that expansion ratio greater than 1 is the most useful.

This interpretation allows us to study the expressiveness of the network separately from its capacity and we believe that further exploration of this separation is warranted to provide a better understanding of the network properties.

## 4. 模型架构 MODEL ARCHITECTURE

Now we describe our architecture in detail. As discussed in the previous section the basic building block is a bottleneck depth-separable convolution with residuals. The detailed structure of this block is shown in Table 1. The architecture of MobileNetV2 contains the initial fully convolution layer with 32 filters, followed by 19 residual bottleneck layers described in the Table 2. We use ReLU6 as the non-linearity because of its robustness when used with low-precision computation [26]. We always use kernel size 3×3 as is standard for modern networks, and utilize dropout and batch normalization during training.

Table 2: MobileNetV2 : Each line describes a sequence of 1 or more identical (modulo stride) layers, repeated n times. All layers in the same sequence have the same number c of output channels. The first layer of each sequence has a stride s and all others use stride 1. All spatial convolutions use 3×3 kernels. The expansion factor t is always applied to the input size as described in Table 1

With the exception of the first layer, we use constant expansion rate throughout the network. In our experiments we find that expansion rates between 5 and 10 result in nearly identical performance curves, with smaller networks being better off with slightly smaller expansion rates and larger networks having slightly better performance with larger expansion rates.

For all our main experiments we use expansion factor of 6 applied to the size of the input tensor. For example, for a bottleneck layer that takes 64-channel input tensor and produces a tensor with 128 channels, the intermediate expansion layer is then 64⋅6=384 channels.

Size MobileNetV1 MobileNetV2 ShuffleNet
(2x,g=3)
112x112 1/O(1) 1/O(1) 1/O(1)
56x56 128/800 32/200 48/300
28x28 256/400 96/150 400/600K
14x14 512/200 160/62 800/310
7x7 1024/199 320/32 1600/156
1x1 1024/2 1280/2 1600/3
max 800K 200K 600K

Table 3: The max number of channels/memory (in Kb) that needs to be materialized at each spatial resolution for different architectures. We assume 16-bit floats for activations. For ShuffleNet, we use 2x,g=3 that matches the performance of MobileNetV1 and MobileNetV2. For the first layer of MobileNetV2 and ShuffleNet we can employ the trick described in Section 4 to reduce memory requirement. Even though ShuffleNet employs bottlenecks elsewhere, the non-bottleneck tensors still need to be materialized due to the presence of shortcuts between non-bottleneck te

As in [26] we tailor our architecture to different performance points, by using the input image resolution and width multiplier as tunable hyper parameters, that can be adjusted depending on desired accuracy/performance trade-offs. Our primary network (width multiplier 1, 224×224), has a computational cost of 300 million multiply-adds and uses 3.4 million parameters. We explore the performance trade offs, for input resolutions from 96 to 224, and width multipliers of 0.35 to 1.4. The network computational cost ranges from 7 multiply adds to 585M MAdds, while the model size vary between 1.7M and 6.9M parameters.

One minor implementation difference, with [26] is that for multipliers less than one, we apply width multiplier to all layers except the very last convolutional layer. This improves performance for smaller models.

## 5. 实现说明 IMPLEMENTATION NOTES

(a) NasNet[22]

(b) MobileNet[26]

(c) ShuffleNet [19]

(d) Mobilenet V2

Figure 4: Comparison of convolutional blocks for different architectures. ShuffleNet uses Group Convolutions [19] and shuffling, it also uses conventional residual approach where inner blocks are narrower than output. ShuffleNet and NasNet illustrations are from respective papers.

### 5.1. 内存有效推断 MEMORY EFFICIENT INFERENCE

The inverted residual bottleneck layers allow a particularly memory efficient implementation which is very important for mobile applications. A standard efficient implementation of inference that uses for instance TensorFlow[30] or Caffe [31], builds a directed acyclic compute hypergraph G, consisting of edges representing the operations and nodes representing tensors of intermediate computation. The computation is scheduled in order to minimize the total number of tensors that needs to be stored in memory. In the most general case, it searches over all plausible computation orders Σ(G) and picks the one that minimizes

$$M(G) = \min_{\pi\in \Sigma(G)} \max_{i \in 1..n} \left[\sum_{A \in R(i, \pi, G)} |A|\right] + \text{size}(\pi_i)$$

where R(i,π,G) is the list of intermediate tensors that are connected to any of πi…πn nodes, |A| represents the size of the tensor A and size(i) is the total amount of memory needed for internal storage during operation i.

For graphs that have only trivial parallel structure (such as residual connection), there is only one non-trivial feasible computation order, and thus the total amount and a bound on the memory needed for inference on compute graph G can be simplified:

。其中$R(i, \pi, G)$是连接到任何$\pi_{i}\dots \pi_{n}$节点的中间张量列表，$|A|$表示张量$A$的大小，$size(i)$是操作$i$期间内部存储所需的总内存量。

$$M(G) = \max_{op \in G} \left[\sum_{A \in \text{op}{inp}} |A| + \sum{B \in \text{op}_{out}} |B| + |op|\right] \tag {2}$$

Or to restate, the amount of memory is simply the maximum total size of combined inputs and outputs across all operations. In what follows we show that if we treat a bottleneck residual block as a single operation (and treat inner convolution as a disposable tensor), the total amount of memory would be dominated by the size of bottleneck tensors, rather than the size of tensors that are internal to bottleneck (and much larger).

#### Bottleneck Residual Block

A bottleneck block operator F(x) shown in Figure 2(b) can be expressed as a composition of three operators F(x)=[A∘N∘B]x, where A is a linear transformation A:Rs×s×k→Rs×s×n, N is a non-linear per-channel transformation: N:Rs×s×n→Rs′×s′×n, and B is again a linear transformation to the output domain: B:Rs′×s′×n→Rs′×s′×k′.

For our networks N=ReLU6∘dwise∘ReLU6, but the results apply to any per-channel transformation. Suppose the size of the input domain is |x| and the size of the output domain is |y|, then the memory required to compute F(X) can be as low as $|s^2 k| + |s’^2 k’| + O(\max(s^2, s’^2))$.

The algorithm is based on the fact that the inner tensor I can be represented as concatenation of t tensors, of size n/t each and our function can then be represented as

$$\mathcal{F}(x) = \sum_{i=1}^t (A_i \circ N \circ B_i)(x)$$

by accumulating the sum, we only require one intermediate block of size n/t to be kept in memory at all times. Using n=t we end up having to keep only a single channel of the intermediate representation at all times. The two constraints that enabled us to use this trick is (a) the fact that the inner transformation (which includes non-linearity and depthwise) is per-channel, and (b) the consecutive non-per-channel operators have significant ratio of the input size to the output. For most of the traditional neural networks, such trick would not produce a significant improvement.

We note that, the number of multiply-adds operators needed to compute F(X) using t-way split is independent of t, however in existing implementations we find that replacing one matrix multiplication with several smaller ones hurts runtime performance due to increased cache misses. We find that this approach is the most helpful to be used with t being a small constant between 2 and 5. It significantly reduces the memory requirement, but still allows one to utilize most of the efficiencies gained by using highly optimized matrix multiplication and convolution operators provided by deep learning frameworks. It remains to be seen if special framework level optimization may lead to further runtime improvements.

## 6. 实验 EXPERIMENTS

### 6.1. ImageNet 分类 IMAGENET CLASSIFICATION

#### Training setup

We train our models using TensorFlow[30]. We use the standard RMSPropOptimizer with both decay and momentum set to 0.9. We use batch normalization after every layer, and the standard weight decay is set to 0.00004. Following MobileNetV1[26] setup we use initial learning rate of 0.045, and learning rate decay rate of 0.98 per epoch. We use 16 GPU asynchronous workers, and a batch size of 96.

#### Results

We compare our networks against MobileNetV1, ShuffleNet and NASNet-A models. The statistics of a few selected models is shown in Table 4 with the full performance graph shown in Figure 5.

Network Top 1 Params MAdds CPU
MobileNetV1 70.6 4.2M 575M 123ms
ShuffleNet (1.5) 69.0 2.9M 292M -
ShuffleNet (x2) 70.9 4.4M 524M -
NasNet-A 74.0 5.3M 564M 192ms
MobileNetV2 71.7 3.4M 300M 80ms
MobileNetV2 (1.4) 74.7 6.9M 585M 149ms

Table 4: Performance on ImageNet, comparison for different networks. As is common practice for ops, we count the total number of Multiply-Adds. In the last column we report running time in milliseconds (ms) for a single large core of the Google Pixel 1 phone (using TF-Lite). We do not report ShuffleNet numbers as the framework does not yet support efficient group convolutions.

### 6.2. 目标检测 OBJECT DETECTION

We evaluate and compare the performance of MobileNetV2 and MobileNetV1 as feature extractors [32] for object detection with a modified version of the Single Shot Detector (SSD) [33] on COCO dataset [3]. We also compare to YOLOv2 [34] and original SSD (with VGG-16 [6] as base network) as baselines. We do not compare performance with other architectures such as Faster-RCNN [35] and RFCN [36] since our focus is on mobile/real-time models.

SSDLite: In this paper, we introduce a mobile friendly variant of regular SSD. We replace all the regular convolutions with separable convolutions (depthwise followed by 1×1 projection) in SSD prediction layers. This design is in line with the overall design of MobileNets and is seen to be much more computationally efficient. We call this modified version SSDLite. Compared to regular SSD, SSDLite dramatically reduces both parameter count and computational cost as shown in Table 5.

SSDLite 在本文中，我们将介绍常规 SSD 的移动友好型变种。我们在 SSD 预测层中用可分离卷积（深度方向后接$1\times 1$投影）替换所有常规卷积。这种设计符合 MobileNets 的整体设计，并且在计算上效率更高。我们称之为修改版本的 SSDLite。与常规 SSD 相比，SSDLite 显著降低了参数计数和计算成本，如表 5 所示。

SSD[33] 14.8M 1.25B
SSDLite 2.1M 0.35B

Table 5: Comparison of the size and the computational cost between SSD and SSDLite configured with MobileNetV2 and making predictions for 80 classes.

For MobileNetV1, we follow the setup in [32]. For MobileNetV2, the first layer of SSDLite is attached to the expansion of layer 15 (with output stride of 16). The second and the rest of SSDLite layers are attached on top of the last layer (with output stride of 32). This setup is consistent with MobileNetV1 as the first and second layers are attached to the feature map of the same output strides.

Both MobileNet models are trained and evaluated with Open Source TensorFlow Object Detection API [37]. The input resolution of both models is 320×320. We benchmark and compare both mAP (COCO challenge metrics), number of parameters and number of Multiply-Adds. The results are shown in Table 6. MobileNetV2 SSDLite is not only the most efficient model, but also the most accurate of the three. Notably, MobileNetV2 SSDLite is 20× more efficient and 10× smaller while still outperforms YOLOv2 on COCO dataset.

MobileNet 模型都经过了开源 TensorFlow 目标检测 API 的训练和评估[38]。 两个模型的输入分辨率为$320 \times 320$。我们进行了基准测试并比较了 mAP（COCO 挑战度量标准），参数数量和 Multiply-Adds 数量。结果如表 6 所示。MobileNetV2 SSDLite 不仅是最高效的模型，而且也是三者中最准确的模型。值得注意的是，MobileNetV2 SSDLite 效率高 20 倍，模型要小 10 倍，但仍优于 COCO 数据集上的 YOLOv2。

SSD300[33] 23.2 36.1M 35.2B -
SSD512[33] 26.8 36.1M 99.5B -
YOLOv2[34] 21.6 50.7M 17.5B -
MNet V1 + SSDLite 22.2 5.1M 1.3B 270ms
MNet V2 + SSDLite 22.1 4.3M 0.8B 200ms

Table 6: Performance comparison of MobileNetV2 + SSDLite and other realtime detectors on the COCO dataset object detection task. MobileNetV2 + SSDLite achieves competitive accuracy with significantly fewer parameters and smaller computational complexity. All models are trained on trainval35k and evaluated on test-dev. SSD/YOLOv2 numbers are from [34]. The running time is reported for the large core of the Google Pixel 1 phone, using an internal version of the TF-Lite engine.

### 6.3. 语义分割 SEMANTIC SEGMENTATION

In this section, we compare MobileNetV1 and MobileNetV2 models used as feature extractors with DeepLabv3 [38] for the task of mobile semantic segmentation. DeepLabv3 adopts atrous convolution [39, 40, 41], a powerful tool to explicitly control the resolution of computed feature maps, and builds five parallel heads including (a) Atrous Spatial Pyramid Pooling module (ASPP) [42] containing three 3×3 convolutions with different atrous rates, (b) 1×1 convolution head, and (c) Image-level features [43]. We denote by output_stride the ratio of input image spatial resolution to final output resolution, which is controlled by applying the atrous convolution properly. For semantic segmentation, we usually employ \emphoutput_stride=16 or 8 for denser feature maps. We conduct the experiments on the PASCAL VOC 2012 dataset [4], with extra annotated images from [44] and evaluation metric mIOU.

Network OS ASPP MF mIOU Params MAdds
MNet V1 16 75.29 11.15M 14.25B
8 78.56 11.15M 941.9B
MNet V2* 16 75.70 4.52M 5.8B
8 78.42 4.52M 387B
MNet V2* 16 75.32 2.11M 2.75B
8 77.33 2.11M 152.6B
ResNet-101 16 80.49 58.16M 81.0B
8 82.70 58.16M 4870.6B

Table 7: MobileNet + DeepLabv3 inference strategy on the PASCAL VOC 2012 validation set. MNet V2*: Second last feature map is used for DeepLabv3 heads, which includes (1) Atrous Spatial Pyramid Pooling (ASPP) module, and (2) 1×1 convolution as well as image-pooling feature. OS: output_stride that controls the output resolution of the segmentation map. MF: Multi-scale and left-right flipped inputs during test. All of the models have been pretrained on COCO. The potential candidate for on-device applications is shown in bold face. PASCAL images have dimension 512×512 and atrous convolution allows us to control output feature resolution without increasing the number of parameters.

### 6.4. 消融研究 ABLATION STUDY

Inverted residual connections. The importance of residual connection has been studied extensively [1, 28, 45]. The new result reported in this paper is that the shortcut connecting bottleneck perform better than shortcuts connecting the expanded layers (see Figure 5(b) for comparison).

Importance of linear bottlenecks. Theoretically, the linear bottleneck models are strictly less powerful than models with non-linearities, because the activations can always operate in linear regime with appropriate changes to biases and scaling. However our experiments shown in Figure 5(a) indicate that linear bottlenecks improve performance, providing a strong support for the hypothesis that a non-linearity operator is not beneficial in the low-dimensional space of a bottleneck.

Figure 6: The impact of non-linearities and various types of shortcut (residual) connections.

## 7. 总结及将来工作 CONCLUSIONS AND FUTURE WORK

We described a new network architecture that allowed us to build a family of efficient mobile models that improves the state of the art at a wide range of performance points. Our basic building unit, has several properties that make it particularly suitable for mobile applications. It allows very memory-efficient inference and can utilize standard operations present in all neural frameworks.

For the ImageNet dataset, our architecture works for models ranging from 10 Million Mult-Adds to 580 Million Mult-Adds improving on the state of the art. Additionally, the architectures are dramatically simpler than the previous state of the art based on automatic network search.

For object detection task, our network outperforms state-of-art realtime detectors on COCO dataset both in terms of accuracy and model complexity. Notably, our architecture combined with the SSDLite detection module is 20× less computation and 10× less parameters than YOLOv2.

On the theoretical side: the proposed convolutional block has a unique property that allows to separate the network expressivity (encoded by expansion layers) from its capacity (encoded by bottleneck inputs). Exploring this is an important direction for future research.

## 致谢 Acknowledgments

We would like to thank Matt Streeter and Sergey Ioffe for their helpful feedback and discussion.

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